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		<span class="date"><a href="/skidl/an-arduino-with-skidl-2017-04-01.html">Sat 01 April 2017</a></span>
		/
		<span class="byline"><a href="/skidl/author/dave-vandenbout.html">Dave Vandenbout</a></span>
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		<h2 class="entry-title">
			<a href="/skidl/an-arduino-with-skidl-2017-04-01.html" title="Permalink to An Arduino With SKiDL" rel="bookmark">An Arduino With SKiDL</a>
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			<p>It's April 1st. It's also <a href="https://day.arduino.cc/">Arduino Day</a>. Really. That's not a joke.</p>
<p>In honor of such an august occasion, I'm going to show you how to describe
an Arduino board using SKiDL.
It's really easy; just takes two steps:</p>
<ol>
<li>Find an existing Arduino board designed using KiCad and export its netlist.</li>
<li>Use the <code>netlist_to_skidl</code> utility to convert it into a SKiDL file.</li>
</ol>
<p>For step #1, I'm going to use the <a href="https://github.com/rheingoldheavy/arduino_uno_r3_from_scratch">Arduino Uno R3 design</a> 
done by <a href="http://www.rheingoldheavy.com/">Dan Hienzsch</a>.
There are two great features of Dan's design:</p>
<ul>
<li>All the parts are heavily annotated with their manufacturers, part numbers, 
  descriptions, usage notes, etc.</li>
<li>It's already done, which means I don't have to do it.</li>
</ul>
<p><img alt="A page of the Arduino schematic." src="images/an-arduino-with-skidl/arduino-schematic.png"></p>
<p>After loading the Arduino project with KiCad, the netlist for the design
is exported by the Eeschema schematic editor using the <code>Tools =&gt; Generate Netlist File...</code>
menu command.
The netlist file is called <code>Arduino_Uno_R3_From_Scratch.net</code>.</p>
<p>Step #2 - converting the Arduino netlist into a SKiDL script - is even easier:</p>
<div class="highlight"><pre><span></span><code>netlist_to_skidl<span class="w"> </span>-i<span class="w"> </span>Arduino_Uno_R3_From_Scratch.net<span class="sb">`</span>
</code></pre></div>

<p>That's it!
You can look inside <code>Arduino_Uno_R3_From_Scratch.py</code> and see the SKiDL code for the Arduino board.
It's divided into three sections:</p>
<ul>
<li>Definitions of <em>part templates</em>.</li>
<li>Instantiations of the templates to create the actual parts in the design.</li>
<li>Instantiations of <em>nets</em> to which the pins of the instantiated parts
  are attached to form connections.</li>
</ul>
<p>For example, here is the definition of a template for a diode:</p>
<div class="highlight"><pre><span></span><code><span class="n">device_D</span> <span class="o">=</span> <span class="n">Part</span><span class="p">(</span><span class="s2">&quot;Device&quot;</span><span class="p">,</span> <span class="s1">&#39;D&#39;</span><span class="p">,</span> <span class="n">dest</span><span class="o">=</span><span class="n">TEMPLATE</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;Characteristics&#39;</span><span class="p">,</span> <span class="s1">&#39;DIODE GEN PURP 100V 300MA SOD123&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;Description&#39;</span><span class="p">,</span> <span class="s1">&#39;ATMEGA328P ICSP Reset Voltage Spike Protection&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;MFN&#39;</span><span class="p">,</span> <span class="s1">&#39;Diodes Inc&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;MFP&#39;</span><span class="p">,</span> <span class="s1">&#39;1N4148W-7-F&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;Package ID&#39;</span><span class="p">,</span> <span class="s1">&#39;SOD123&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;Source&#39;</span><span class="p">,</span> <span class="s1">&#39;ANY&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;Critical&#39;</span><span class="p">,</span> <span class="s1">&#39;N&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">device_D</span><span class="p">,</span> <span class="s1">&#39;Subsystem&#39;</span><span class="p">,</span> <span class="s1">&#39;328P_Sub&#39;</span><span class="p">)</span>
</code></pre></div>

<p>Further down in the script, this template is instantiated three times to create
three different parts, each with slightly different characteristics:</p>
<div class="highlight"><pre><span></span><code><span class="n">D1</span> <span class="o">=</span> <span class="n">device_D</span><span class="p">(</span><span class="n">ref</span><span class="o">=</span><span class="s1">&#39;D1&#39;</span><span class="p">,</span> <span class="n">value</span><span class="o">=</span><span class="s1">&#39;DIODE&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D1</span><span class="p">,</span> <span class="s1">&#39;Characteristics&#39;</span><span class="p">,</span> <span class="s1">&#39;1A, 1000V, SILICON, SIGNAL DIODE, ROHS COMPLIANT, COMPACT, PLASTIC, CASE 403D-02, SMA, 2 PIN&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D1</span><span class="p">,</span> <span class="s1">&#39;Description&#39;</span><span class="p">,</span> <span class="s1">&#39;Reverse Voltage Protection Diode&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D1</span><span class="p">,</span> <span class="s1">&#39;MFN&#39;</span><span class="p">,</span> <span class="s1">&#39;ON Semi&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D1</span><span class="p">,</span> <span class="s1">&#39;MFP&#39;</span><span class="p">,</span> <span class="s1">&#39;MRA4007T3G&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D1</span><span class="p">,</span> <span class="s1">&#39;Package ID&#39;</span><span class="p">,</span> <span class="s1">&#39;R-PDSO-J2&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D1</span><span class="p">,</span> <span class="s1">&#39;Subsystem&#39;</span><span class="p">,</span> <span class="s1">&#39;Voltage_Reg&#39;</span><span class="p">)</span>

<span class="n">D4</span> <span class="o">=</span> <span class="n">device_D</span><span class="p">(</span><span class="n">ref</span><span class="o">=</span><span class="s1">&#39;D4&#39;</span><span class="p">,</span> <span class="n">value</span><span class="o">=</span><span class="s1">&#39;1N4148W-7-F&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D4</span><span class="p">,</span> <span class="s1">&#39;Description&#39;</span><span class="p">,</span> <span class="s1">&#39;ATMEGA16U2 ICSP Reset Voltage Spike Protection&#39;</span><span class="p">)</span>
<span class="nb">setattr</span><span class="p">(</span><span class="n">D4</span><span class="p">,</span> <span class="s1">&#39;Subsystem&#39;</span><span class="p">,</span> <span class="s1">&#39;16U2_Sub&#39;</span><span class="p">)</span>

<span class="n">D7</span> <span class="o">=</span> <span class="n">device_D</span><span class="p">(</span><span class="n">ref</span><span class="o">=</span><span class="s1">&#39;D7&#39;</span><span class="p">,</span> <span class="n">value</span><span class="o">=</span><span class="s1">&#39;1N4148W-7-F&#39;</span><span class="p">)</span>
</code></pre></div>

<p>Finally, connections of these diodes to nets are defined:</p>
<div class="highlight"><pre><span></span><code><span class="n">net__32</span> <span class="o">=</span> <span class="n">Net</span><span class="p">(</span><span class="s1">&#39;Vin&#39;</span><span class="p">)</span>
<span class="n">net__32</span> <span class="o">+=</span> <span class="n">C1</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">P1</span><span class="p">[</span><span class="s1">&#39;8&#39;</span><span class="p">],</span> <span class="n">D1</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">R2</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">U1</span><span class="p">[</span><span class="s1">&#39;3&#39;</span><span class="p">]</span>

<span class="n">net__29</span> <span class="o">=</span> <span class="n">Net</span><span class="p">(</span><span class="s1">&#39;5V_LDO&#39;</span><span class="p">)</span>
<span class="n">net__29</span> <span class="o">+=</span> <span class="n">C4</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">U4</span><span class="p">[</span><span class="s1">&#39;32&#39;</span><span class="p">],</span> <span class="n">C9</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">U4</span><span class="p">[</span><span class="s1">&#39;4&#39;</span><span class="p">],</span> <span class="n">U5</span><span class="p">[</span><span class="s1">&#39;20&#39;</span><span class="p">],</span> <span class="n">U5</span><span class="p">[</span><span class="s1">&#39;7&#39;</span><span class="p">],</span> <span class="n">C5</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">U3</span><span class="p">[</span><span class="s1">&#39;3&#39;</span><span class="p">],</span> <span class="n">Q1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">C15</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">R16</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">D7</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">U3</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">ICSP2</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">U2</span><span class="p">[</span><span class="s1">&#39;8&#39;</span><span class="p">],</span> <span class="n">ICSP1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">R11</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">R10</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">R7</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">P1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">P1</span><span class="p">[</span><span class="s1">&#39;5&#39;</span><span class="p">],</span> <span class="n">R1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">C2</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">C3</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">D4</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">U1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">]</span>

<span class="n">net__33</span> <span class="o">=</span> <span class="n">Net</span><span class="p">(</span><span class="s1">&#39;Net-(CON1-Pad2)&#39;</span><span class="p">)</span>
<span class="n">net__33</span> <span class="o">+=</span> <span class="n">CON1</span><span class="p">[</span><span class="s1">&#39;3&#39;</span><span class="p">],</span> <span class="n">CON1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">D1</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">]</span>

<span class="n">net__54</span> <span class="o">=</span> <span class="n">Net</span><span class="p">(</span><span class="s1">&#39;Net-(D4-Pad1)&#39;</span><span class="p">)</span>
<span class="n">net__54</span> <span class="o">+=</span> <span class="n">D4</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">U4</span><span class="p">[</span><span class="s1">&#39;24&#39;</span><span class="p">],</span> <span class="n">ICSP1</span><span class="p">[</span><span class="s1">&#39;5&#39;</span><span class="p">],</span> <span class="n">R7</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">]</span>

<span class="n">net__5</span> <span class="o">=</span> <span class="n">Net</span><span class="p">(</span><span class="s1">&#39;/ATMEGA328P/328P_RESET&#39;</span><span class="p">)</span>
<span class="n">net__5</span> <span class="o">+=</span> <span class="n">D7</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">U5</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">SW1</span><span class="p">[</span><span class="s1">&#39;4&#39;</span><span class="p">],</span> <span class="n">P1</span><span class="p">[</span><span class="s1">&#39;3&#39;</span><span class="p">],</span> <span class="n">R16</span><span class="p">[</span><span class="s1">&#39;1&#39;</span><span class="p">],</span> <span class="n">R13</span><span class="p">[</span><span class="s1">&#39;2&#39;</span><span class="p">],</span> <span class="n">SW1</span><span class="p">[</span><span class="s1">&#39;3&#39;</span><span class="p">],</span> <span class="n">ICSP2</span><span class="p">[</span><span class="s1">&#39;5&#39;</span><span class="p">]</span>
</code></pre></div>

<p>You can see the entire Arduino SKiDL script <a href="https://gist.github.com/xesscorp/00d48e7ee31fedad00d6b07b9ddd0189">here</a>.</p>
<p>Once the SKiDL script is available, you can execute it to create the netlist
for an Arduino and then create the PCB using KiCad's <code>PCBNEW</code> layout editor.
Or use the SKiDL code as a module in a larger design.</p>
<p>So that's a complete Arduino in SKiDL.
Happy Arduino Day!</p>
<p>Really. I'm not joking.</p>
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